Conventionally, voltage-mode control (VMC) is commonly used in switching regulators. VMC-type switching regulators stabilize output voltage by performing PWM control on a switching device in accordance with the voltage difference between the output voltage and a reference voltage. However, the VMC-type switching regulators, which detect a feedback signal from the output voltage, are slow in responding to a change in the output voltage, thus causing a problem in that the phase compensation of an error amplifier circuit amplifying the voltage difference between the output voltage and the reference voltage is complicated.
In recent years, switching regulators of a current-mode control (CMC) type have been widely used as a technology to overcome the above-described defects. It is known, however, that if the on-duty cycle of PWM control exceeds 50%, subharmonic oscillation occurs in the CMC-type switching regulators so that the CMC-type switching regulators become uncontrollable. As a measure against this, usually, slope compensation is performed on PWM control, thereby preventing subharmonic oscillation.
FIG. 1 is a circuit diagram showing a CMC-type switching regulator 100 with a circuit performing such slope compensation (see, for example, Japanese Examined Utility Model Application Publication No. 7-39346).
Referring to FIG. 1, the switching regulator 100 includes a constant voltage control feedback loop and a constant current control feedback loop. The voltage difference between an output voltage Vo supplied to a load 105 and a reference voltage Vr is amplified in an error amplifier circuit 109. The output voltage of the error amplifier circuit 109 is input to the inverting input of a voltage comparator circuit 108 included in a peak current controller circuit 107. The output voltage of a current detector 106 is applied to the non-inverting input of the voltage comparator circuit 108. The current detector 106 includes a current transformer. The current detector 106 detects current pulses with slope flowing on the secondary side of a transformer 102, converts the current pulses into voltage, and outputs the voltage to the non-inverting input of the voltage comparator circuit 108. Reference numeral 104 denotes a rectifying and smoothing circuit.
The peak current controller circuit 107 includes the voltage comparator circuit 108, a flip-flop circuit 110, and an oscillator circuit (OSC) 112. The flip-flop circuit 110 is set by a clock signal output from the oscillator circuit 112, and is reset by the output signal of the voltage comparator circuit 108. The output Q of the flip-flop circuit 110 is connected to the input of a driver circuit 111, and controls the gate voltage of a switching device 103 through the driver circuit 111 so as to perform ON/OFF control of the switching device 103. The driver circuit 111 is formed of an emitter follower circuit of an NPN transistor 117 and a PNP transistor 118. The output of the driver circuit 111 is also connected to a slope compensator circuit 116.
The slope compensator circuit 116 includes an integrating circuit of a resistor 119 and a capacitor 120, a diode 121 for rapidly discharging the electric charge of the capacitor 120, and a resistor 122 for adding the voltage across the capacitor 120 to the output voltage of the current detector 106. If the output signal of the driver circuit 111 is HIGH (at a high level), the switching device 103 turns ON and the capacitor 120 is charged through the resistor 119 so that a slope voltage is generated. If the output signal of the driver circuit 111 is LOW (at a low level), the switching device 103 turns OFF, and the electric charge of the capacitor 120 is discharged through the diode 121 in a short period of time, thereby generating sawtooth wave voltage. The slope compensator circuit 116 performs slope compensation by adding the sawtooth wave voltage to the output voltage of the current detector 106.
However, the inclination of a compensation slope in the slope compensator circuit 116 is determined by supply voltage Vcc and the specific values of the resistor 119 and the capacitor 120. Accordingly, if the supply voltage Vcc is constant, the slope voltage to be generated is constant in level, and the inclination of its slope is reduced over time. Accordingly, since the amount of slope compensation remains unchanged even in the case of changing the output voltage Vo, the slope compensation becomes excessive or insufficient depending on the combination of the output voltage Vo and load current, so that subharmonic oscillation may be caused. Further, subharmonic oscillation occurs when the on-duty cycle of PWM control is greater than or equal to 50%. Accordingly, it is desirable that the inclination of the slope be constant or increase over time. However, according to the above-described conventional configuration, the inclination of the slope is reduced over time. Accordingly, in the case of a less than 50% on-duty cycle of PWM control, where no slope compensation is necessary, the slope compensation becomes excessive, so that the accuracy of the output voltage Vo is impaired in the area of less output current.